Microchip Technology dsPIC33F Family Spécifications Page 5

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© 2008-2012 Microchip Technology Inc. DS70323E-page 43-5
Section 43. High-Speed PWM
High-Speed PWM
43
LEBDLYx: Leading-Edge Blanking Delay Register
- Specifies the blanking time for the selected Fault input and current-limit signals
AUXCONx: PWM Auxiliary Control Register
- Enables or disables the high-resolution PWM period and the duty cycle in order to
reduce the system power consumption
- Selects the state blanking signal for the current-limit signals and the Fault inputs
PWMCAPx: Primary PWM Time Base Capture Register
- Provides the captured independent time base value when a leading-edge is detected
on the current-limit input
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